NDLI: Current-Mode Winner-Take-All Circuit with Improved Dynamic Response

Content Provider	Springer Nature Link
Author	Moro Frias, David Ventura Arizmendi, Carlos Sanz Pascual, Maria Teresa Cruz Blas, Carlos Aristoteles
Copyright Year	2014
Abstract	A novel current-mode Winner-Take-All (WTA) topology is presented in this paper. The dynamic response of the circuit is improved by lowering the voltage swing required at the input nodes to turn on the winning cell. The WTA was designed and fabricated in 0.13 $$μ $$ m CMOS technology with 2.5 V single supply voltage. Experimental results show an at least 26 % reduction in response time, as well as a reduction in the maximum output current error, when compared to other widely used current-mode topologies, with comparable bandwidth, area, and power consumption. The area of the proposed circuit is 47 $$\times $$ 41 $$μ \mathrm{m}^{2}$$ and it consumes 87 $$μ $$ W per unit cell. The measured maximum output current error was 4.8 $$μ $$ A, and a resolution of 1.85 $$μ $$ A was obtained. The capability of the WTA to rectify signals was also experimentally demonstrated.
Starting Page	625
Ending Page	639
Page Count	15
File Format	PDF
ISSN	0278081X
Journal	Circuits, Systems, and Signal Processing
Volume Number	34
Issue Number	2
e-ISSN	15315878
Language	English
Publisher	Springer US
Publisher Date	2014-08-03
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Analog CMOS integrated circuits Winner-take-all circuits Current-mode signal processing MAX Circuits Circuits and Systems Electrical Engineering Signal, Image and Speech Processing Electronics and Microelectronics, Instrumentation
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Signal Processing

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