NDLI: Comparison of DEM and BEET Linearization Techniques for Flash Analog-to-Digital Converters

Content Provider	Springer Nature Link
Author	McGuinness, Christopher D. Balster, Eric J. Scarpi, Frank A.
Copyright Year	2013
Abstract	Data converter linearization has been a subject of some interest for most of the past decade. New methods of linearizing analog-to-digital converters (ADCs) continue to be developed. Various linearization methods are available but their comparative strengths and weaknesses are not easily recognizable, making it somewhat difficult to determine which compensator would provide maximum benefit for a specific device. This paper provides a novel performance comparison of two promising real-time linearization methods for flash ADCs: the in-device DEM method, and the peripherally-implemented BEET method using SFDR, SINAD, ENOB, and THD as performance metrics. It is found that BEET is the superior compensator for devices with INL values larger than 0.25 LSB and DNL values larger than 0.25 LSB for optimal SFDR. Results from SINAD, ENOB, and THD metrics indicate that BEET is superior compared to DEM for all devices that have INL>0.05 LSB.
Starting Page	2639
Ending Page	2652
Page Count	14
File Format	PDF
ISSN	0278081X
Journal	Circuits, Systems, and Signal Processing
Volume Number	32
Issue Number	6
e-ISSN	15315878
Language	English
Publisher	Springer US
Publisher Date	2013-05-14
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Analog–digital conversion Nonlinear distortion Linear approximation Error correction Simulation Circuits and Systems Electrical Engineering Signal, Image and Speech Processing Electronics and Microelectronics, Instrumentation
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Signal Processing

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Comparison of DEM and BEET linearization techniques for flash analog-to-digital converters using a SFDR metric

Digital Domain Measurement and Cancellation of Residue Amplifier Nonlinearity in Pipelined ADCs

A model for flash analog-to-digital converters with bit-extended error table linearization

Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters

A Flash ADC Tolerant to High Offset Voltage Comparators

Analog-to-Digital Conversion, 2nd Edition 2013

Digital techniques for improving the accuracy of data converters

Gain and offset correction methods for analog-to-digital converters

Generation and Analysis of Constrained Random Sampling Patterns

Comparison of DEM and BEET Linearization Techniques for Flash Analog-to-Digital Converters

Similar Documents

Comparison of DEM and BEET linearization techniques for flash analog-to-digital converters using a SFDR metric

Digital Domain Measurement and Cancellation of Residue Amplifier Nonlinearity in Pipelined ADCs

A model for flash analog-to-digital converters with bit-extended error table linearization

Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters

A Flash ADC Tolerant to High Offset Voltage Comparators

Analog-to-Digital Conversion, 2nd Edition 2013

Digital techniques for improving the accuracy of data converters

Gain and offset correction methods for analog-to-digital converters

Generation and Analysis of Constrained Random Sampling Patterns

Comparison of DEM and BEET Linearization Techniques for Flash Analog-to-Digital Converters