NDLI: Memory-Reduced Maximum A Posteriori Probability Decoding for High-Throughput Parallel Turbo Decoders

Content Provider	Springer Nature Link
Author	Shrestha, Rahul Paily, Roy
Copyright Year	2015
Abstract	Wireless communication standards make use of parallel turbo decoder for higher data rate at the cost of large hardware resources. This paper presents a memory-reduced back-trace technique, which is based on a new method of estimating backward-recursion factors, for the maximum a posteriori probability (MAP) decoding. Mathematical reformulations of branch-metric equations are performed to reduce the memory requirement of branch metrics for each trellis stage. Subsequently, an architecture of MAP decoder and its scheduling based on the proposed back trace as well as branch-metric reformulation are presented in this work. Comparative analysis of bit-error-rate (BER) performances in additive white Gaussian noise channel environment for MAP as well as parallel turbo decoders are carried out. It has shown that a MAP decoder with a code rate of 1/2 and a parallel turbo decoder with a code rate of 1/3 have achieved coding gains of 1.28 dB at a BER of 10 $$^{-5}$$ and of 0.4 dB at a BER of 10 $$^{-4}$$ , respectively. In order to meet high-data-rate benchmarks of recently deployed wireless communication standards, very large scale integration implementations of parallel turbo decoder with 8–64 MAP decoders have been reported. Thereby, savings of hardware resources by such parallel turbo decoders based on the suggested memory-reduced techniques are accounted in terms of complementary metal oxide semiconductor transistor count. It has shown that the parallel turbo decoder with 32 and 64 MAP decoders has shown hardware savings of 34 and 44 % respectively.
Starting Page	2832
Ending Page	2854
Page Count	23
File Format	PDF
ISSN	0278081X
Journal	Circuits, Systems, and Signal Processing
Volume Number	35
Issue Number	8
e-ISSN	15315878
Language	English
Publisher	Springer US
Publisher Date	2015-09-22
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Sliding-window Bahl–Cocke–Jelinek–Raviv (SWBCJR) algorithm Maximum a posteriori probability (MAP) decoder Turbo code Parallel turbo decoder Bit-error-rate (BER) performance Very large scale integration (VLSI) design Circuits and Systems Electrical Engineering Signal, Image and Speech Processing Electronics and Microelectronics, Instrumentation
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Signal Processing

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