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Scale Free Hyperbolic Cordic Processor using Taylor Series
| Content Provider | Semantic Scholar |
|---|---|
| Author | Abraham, Subit Gour, Puran |
| Copyright Year | 2013 |
| Abstract | To design a CORDIC processor using hyperbolic functions of sinh and cosh and reduce the scale factor , here we use Taylor series approximation to eliminate scaling in the hyperbolic functions. Here we work in the rotation mode of the algorithm, and a scale free hyperbolic CORDIC processor is designed using VHDL in Xilinx 12.1 ISE Design Suite. Most Significant One bit detection is used for microrotation sequence generation. The input values are converted to 16 bit binary since we are designing for 16 bit Scale free hyperbolic CORDIC Processor. The input coordinates are taken from the LUT initial values .The device used is Virtex 5 XC5VLX330T-2FF1738 in Xilinx to design the CORDIC Processor , 398 slice LUTS are used during the design and number of occupied slices is 257 in the synthesis.. Keywords—Coordinate Rotation Digital Computer (CORDIC), microrotations, rotation mode, scale factor, Taylor series. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.ijetae.com/files/Volume3Issue6/IJETAE_0613_71.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
