NDLI: FIR Filter Design Using The Signed-Digit Number System and Carry Save Adders – A Comparison

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FIR Filter Design Using The Signed-Digit Number System and Carry Save Adders – A Comparison

Content Provider	Semantic Scholar
Author	Altwaijry, Hesham
Copyright Year	2014
Abstract	This work looks at optimizing finite impulse response (FIR) filters from an arithmetic perspective. Since the main two arithmetic operations in the convolution equations are addition and multiplication, they are the targets of the optimization. Therefore, considering carry-propagate-free addition techniques should enhance the addition operation of the filter. The signed-digit number system is utilized to speedup addition in the filter. An alternative carry propagate free fast adder, carry-save adder, is also used here to compare its performance to the signed-digit adder. For multiplication, Booth encoding is used to reduce the number of partial products. The two filters are modeled in VHDL, synthesized and place-androuted. The filters are deployed on a development board to filter digital images. The resultant hardware is analyzed for speed and logic utilization Keywords— FIR Filters – Signed Digit – Carry-Save – FPGA
File Format	PDF HTM / HTML
Alternate Webpage(s)	http://thesai.org/Downloads/Volume4No12/Paper_8-Fir_Filter_Design_Using_The_Signed-Digit_Number_System_and_Carry_Save_Adders.pdf
Language	English
Access Restriction	Open
Subject Keyword	Adder (electronics) Booth's multiplication algorithm Carry-lookahead adder Carry-save adder Convolution Digit - number character Digital image Field-programmable gate array Filter design Finite impulse response HL7PublishingSubSection Mathematical optimization Microprocessor development board Resultant Signature Speedup VHDL
Content Type	Text
Resource Type	Article

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