NDLI: Discontinuous Galerkin methods for the Boltzmann-Poisson systems in semiconductor device simulations

Please wait, while we are loading the content...

Discontinuous Galerkin methods for the Boltzmann-Poisson systems in semiconductor device simulations

Content Provider	Semantic Scholar
Author	Cheng, Yingda Majorana, Armando Shu, Chi-Wang
Copyright Year	2010
Abstract	We are interested in the deterministic computation of the transients for the Boltzmann-Poisson system describing electron transport in semiconductor devices. The main difficulty of such computation arises from the very high dimensions of the model, making it necessary to use relatively coarse meshes and hence requiring the numerical solver to be stable and to have good resolution under coarse meshes. In this paper we consider the discontinuous Galerkin (DG) method, which is a finite element method using discontinuous piecewise polynomials as basis functions and numerical fluxes based on upwinding for stability, for solving the Boltzmann-Poisson system. In many situations, the deterministic DG solver can produce accurate solutions with equal or less CPU time than the traditional DSMC (Direct Simulation Monte Carlo) solvers. Numerical simulation results on a diode and a 2D double-gate MOSFET are given.
File Format	PDF HTM / HTML
Alternate Webpage(s)	http://www2.aero.psu.edu/RGD_2010/PaperSubmission_Full_Uploads/Gamba,%20Irene%20M_331_PDF_rgd_27_gamba_331.pdf
Language	English
Access Restriction	Open
Subject Keyword	Basis function CPU (central processing unit of computer system) Central processing unit Computation (action) Deterministic automaton Dimensions Diode Device Component Direct simulation Monte Carlo Discontinuous Galerkin method Electron Transport Finite element method Monte Carlo method Numerical analysis Numerical method Polynomial Semiconductor device Solutions Solver Upwind scheme
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in