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Using Sparse Crossbars within LUT Clusters
| Content Provider | Semantic Scholar |
|---|---|
| Author | Lemieux, Guy Lewis, David |
| Copyright Year | 2001 |
| Abstract | In FPGAs, the internal connections in a cluster of lookup tables (LUTs) are often fully-connected like a full crossbar. Such a high degree of connectivity makes routing easier, but has significant area overhead. This paper explores the use of sparse crossbars as a switch matrix inside the clusters between the cluster inputs and the LUT inputs. We have reduced the switch densities inside these matrices by 50% or more and saved from 10 to 18% in area with no degradation to critical-path delay. To compensate for the loss of routability, increased compute time and spare cluster inputs are required. Further investigation may yield modest area and delay reductions. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.eecg.toronto.edu/~lemieux/publications/FPGA01.pdf |
| Alternate Webpage(s) | http://www.ece.ubc.ca/~lemieux/publications/lemieux-fpga2001.pdf |
| Alternate Webpage(s) | http://tcfpga.org/fpga20/p188.pdf |
| Alternate Webpage(s) | http://www.cecs.uci.edu/~papers/compendium94-03/papers/2001/fpga01/pdffiles/p059_lemieux.pdf |
| Alternate Webpage(s) | http://www.eecg.toronto.edu/~lemieux/publications/FPGA01.ps.gz |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
