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Low power, low area and high Performance Hybrid Type DYNAMIC CAM design
Content Provider | Semantic Scholar |
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Author | Nagarjuna, V. Kittur, Harish M. |
Copyright Year | 2011 |
Abstract | Content-addressable memories (CAMs) are hardware search engines that are much faster than algorithmic approaches for search-intensive applications. CAMs are composed of conventional semiconductor memory (usually SRAM) with added comparison circuitry that enables a search operation to complete in a single clock cycle. In case of advanced applications we need large sized CAM but it has the disadvantage of high power consumption. To overcome the drawbacks we need to reduce the power consumption of the CAM when we search the data. This paper proposes an idea for improving power, area and performance of the system of recently proposed high Performance Hybrid-Type CAM Designs. For this we replace the basic 9T CAM cell with a 4T CAM cell. The simulation results show the success of the method. |
Starting Page | 430 |
Ending Page | 435 |
Page Count | 6 |
File Format | PDF HTM / HTML |
DOI | 10.5120/2585-3571 |
Alternate Webpage(s) | http://www.ijcaonline.org/volume22/number6/pxc3873571.pdf |
Alternate Webpage(s) | https://www.ijcaonline.org/archives/volume22/number6/2585-3571?format=pdf |
Alternate Webpage(s) | https://doi.org/10.5120/2585-3571 |
Journal | 2011 International Conference on Signal Processing, Communication, Computing and Networking Technologies |
Language | English |
Access Restriction | Open |
Content Type | Text |
Resource Type | Article |