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Low Leakage Nanoscaled Source and Drain over Insulator Finfet with Underlap and High K Dielectric
| Content Provider | Semantic Scholar |
|---|---|
| Author | Bukkawar, Sarika |
| Copyright Year | 2012 |
| Abstract | In this paper a Source and drain over Insulator (SDOI) FinFET structure in which S/D regions insulated from body by buried oxide with undoped underlap and Si3N4 as dielectric is studied and compared with SDOI FinFET with SiO2 as dielectric. An extensive simulation study and analysis of the effect of underlaps on SDOI FinFET has been performed using the TCAD Silvaco (DevEDIT, ATLAS). The simulations have revealed that the SDOI FinFET structures with underlaps and Si3N4 as dielectric improves short channel effect significantly. Keywords—SDOI (source and drain over Insulator); leakage current; short-channel effects (SCEs);silicon-oninsulator (SOI); DIBL, subthreshold slope S; underlap length (LUN). |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.idc-online.com/technical_references/pdfs/electrical_engineering/LOW%20LEAKAGE%20NANOSCALED.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
