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A Designer ’ s Perspective On Future Memory Architectures For Software Defined Radios
| Content Provider | Semantic Scholar |
|---|---|
| Author | Marchal, Pol Bougard, Bruno Papanikolaou, Apostolos Miranda, Mutaleci Catthoor, Francky Dehaeneb, Wim |
| Copyright Year | 2007 |
| Abstract | Data-rich wireless communication terminals, such as smartphones, are integrating an increasing number of wireless access standards. To limit the manufacturing cost, both academia and industry are investigating the concept of software-defined radios (SDR). In this paper, we focus on the design challenges for building the memory architecture of such SDR platforms. Particularly, we advocate the use of advanced processing technologies for reducing cost, and limit the power consumption with widely distributed, still reliable and testable, memory architectures and by applying better-than-worst-case design methods for coping with process uncertainties, inherent to nano-scaled technologies. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.imec.be/tad/IMEC_TAD_papers/2007/ICMTD2007.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
