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Teaching Computer Organization and Architecture with Hands-on Experience
| Content Provider | Semantic Scholar |
|---|---|
| Author | Calazans, Ney Laert Vilar Moraes, Fernando Gehm Marcon, César A. M. |
| Copyright Year | 2002 |
| Abstract | 1 Faculdade de Informática Pontifícia Universidade Católica do Rio Grande do Sul (PUCRS) Porto Alegre BRAZIL 90619-900 calazans@inf.pucrs.br 2 moraes@inf.pucrs.br 3 marcon@inf.pucrs.br Abstract This work describes part of a novel approach employed at the authors' institution in the last five years, which comprises the teaching of computer organization/ architecture through the effective implementation of processors and computers. The context of the courses is presented first, including a comparison of two hardware courses tracks in Computer Science and Computer Engineering curricula. Previous publications have described the structure of courses dealing with the minimal implementation of a working processor. Here, the emphasis is on subsequent courses, which take the minimal implementation and guide the students through the necessary steps to add performance, such as pipelining, and functionality, such as memory management and basic IO subsystems. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://fie.engrng.pitt.edu/fie2002/papers/1255.pdf |
| Alternate Webpage(s) | http://fie-conference.org/fie2002/papers/1255.pdf |
| Alternate Webpage(s) | https://pdfs.semanticscholar.org/d967/4d9f1758112e03120ea8d5bc3fe6cd3fdc12.pdf |
| Language | English |
| Access Restriction | Open |
| Subject Keyword | Aline Systems Assembly language Central processing unit Compiler Computer engineering Computer science Digital electronics Educational Curriculum Hands-on computing Interface Device Component Memory management Microarchitecture Operating system Pipeline (computing) Simulators Track (course) Winsock |
| Content Type | Text |
| Resource Type | Article |
