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Architecture d'un processeur dédié aux traitements de signaux ultrasoniques en temps réel en vue d'une intégration sur puce
| Content Provider | Semantic Scholar |
|---|---|
| Author | Levesque, Philippe |
| Copyright Year | 2011 |
| Abstract | RESUME Cette these se rapporte a la conception d’une nouvelle architecture d’un systeme d’appareils d’imagerie medicale par ultrasons (IMU); nous proposons une architecture materielle d’un processeur dedie au pretraitement de signaux ultrasoniques en temps reel, qui integre un cœur (core) de traitement, un module d’interpolation et un module d’assignation de priorites qui permet de partager le bus de donnees d’une memoire a faible consommation d’energie. Ce processeur dedie represente une contribution importante aux efforts visant a l’integration complete d’un systeme de pretraitement de signaux ultrasoniques a l’interieur d’une sonde qui fait partie des appareillages ultrasoniques conventionnels ainsi qu’a la mise en œuvre d’un nouveau type d’appareil d’IMU sans fil. La litterature des deux dernieres decennies presente diverses approches visant a miniaturiser la technologie de l’IMU. Plusieurs auteurs proposent des solutions en matiere d’integration des circuits frontaux ou de materialisation de nouveaux algorithmes de traitement des signaux ultrasoniques. Les efforts de recherche dans ce domaine sont propulses par l’interet grandissant des marches et par le developpement de nouvelles applications qui beneficient de la miniaturisation de cette technologie. De plus, les performances grandissantes des circuits integres programmables tels que les FPGA offrent les caracteristiques appropriees pour la mise en œuvre de nouveaux systemes d’IMU.----------ABSTRACT This Ph.D. thesis is related to the design of a new architecture of ultrasound medical imaging (UMI) system. We propose a fully hardware-based processor dedicated to real-time ultrasonic signal processing, which incorporates a preprocessing core, a low-power memory, an interpolation unit, and a priority assignment unit. This Ph.D. thesis represents an important contribution towards the complete integration of an ultrasound preprocessing system within the probe and the implementation of a new type of wireless UMI device. During the last two decades, several UMI system miniaturization approaches have been presented in the literature. Some Authors proposed their front-end circuit integration and introduced hardware-based ultrasound signal processing units based on new algorithms. Research efforts in this area are driven by the increasing industrial interest on miniaturized UMI devices and by the development of new applications that benefit from the miniaturization of this technology. Moreover, the increasing performance of programmable circuits, such as FPGA, offers appropriate characteristics for the implementation of new UMI systems. Most UMI system architectures found in the literature are based in whole or in part on a software implementation that uses a central processing unit (CPU) or a digital signal processor (DSP). This software approach provides flexibility and facilitates the implementation of processing algorithms which are becoming ever more effective and complex. However, to provide real-time ultrasound image processing, these systems require high-power consumption or are too large for a complete system integration on a single chip (SoC). |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://publications.polymtl.ca/509/1/2011_PhilippeL%C3%A9vesque.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
