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Accurate Sub-1 V CMOS Bandgap Voltage Reference with PSRR of -118 dB
| Content Provider | Semantic Scholar |
|---|---|
| Author | Abbasizadeh, Hamed Cho, Sunghun Yoo, Sang-Sun Lee, Kang-Yoon |
| Copyright Year | 2016 |
| Abstract | A low voltage high PSRR CMOS Bandgap circuit capable of generating a stable voltage of less than 1 V (0.8 V and 0.5 V) robust to Process, Voltage and Temperature (PVT) variations is proposed. The high PSRR of the circuit is guaranteed by a low-voltage current mode regulator at the central aspect of the bandgap circuitry, which isolates the bandgap voltage from power supply variations and noise. The isolating current mirrors create an internal regulated voltage V reg for the BG core and Op-Amp rather than the V DD . These current mirrors reduce the impact of supply voltage variations. The proposed circuit is implemented in a 0.35 ㎛ CMOS technology. The BGR circuit occupies 0.024 ㎟ of the die area and consumes 200 ㎼ from a 5 V supply voltage at room temperature. Experimental results demonstrate that the PSRR of the voltage reference achieved -118 ㏈ at frequencies up to 1 ㎑ and -55 ㏈ at 1 ㎒ without additional circuits for the curvature compensation. A temperature coefficient of 60 ppm/℃ is obtained in the range of -40 to 120℃. |
| Starting Page | 528 |
| Ending Page | 533 |
| Page Count | 6 |
| File Format | PDF HTM / HTML |
| DOI | 10.5573/JSTS.2016.16.4.528 |
| Volume Number | 16 |
| Alternate Webpage(s) | http://ocean.kisti.re.kr/downfile/crosscheck/ieek/JAKO201625654348309.pdf |
| Alternate Webpage(s) | https://doi.org/10.5573/JSTS.2016.16.4.528 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
