Loading...
Please wait, while we are loading the content...
Similar Documents
Cluster-Based Architecture, Timing-Driven Packing and Timing-Driven Placement for FPGAs
| Content Provider | Semantic Scholar |
|---|---|
| Author | Marquardt, Alexander |
| Copyright Year | 1999 |
| Abstract | As process geometries shrink into the deep-submicron region, interconnect resistance and capaci-tance account for an increasingly significant portion of the delay of circuits implemented in Field-Programmable Gate Arrays (FPGAs). One way to improve FPGA speed is to employ logic-cluster-based architectures which have high-speed local connections among groups of logic elements. In this work we show what size logic-cluster results in the best area-speed trade-off. To obtain the best choices for a cluster-based architecture, we use computer aided design (CAD) tools to experimentally evaluate architectures with different sized logic clusters. As part of this CAD flow, we develop a timing-driven algorithm that packs logic elements into these clusters. In addition, we develop a timing-driven placement algorithm that results in significant improvements in FPGA speed over existing non-timing-driven algorithms. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.eecg.toronto.edu/~jayar/pubs/theses/Marquardt/AlexanderMarquardt.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
