NDLI: A 4.6 W/mm2 Power Density 86% Efficiency On-Chip Switched Capacitor DC-DC Converter in 32nm SOI CMOS

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A 4.6 W/mm2 Power Density 86% Efficiency On-Chip Switched Capacitor DC-DC Converter in 32nm SOI CMOS

Content Provider	Semantic Scholar
Author	Andersen, T. Krismer, Florian Kolar, Johann Walter Toifl, Thomas Menolfi, Christian Kull, Lukas Morf, Tobias Kossel, M. Braendli, Matthias Buchmann, Peter Francese, P. A.
Copyright Year	2012
Abstract	The future trends in microprocessor supply current requirements represent a bottleneck for next generation highperformance microprocessors since the number of supply pins will constitute an increasingly larger fraction of the total number of package pins available. This leaves few pins available for signaling. On-chip power conversion is a means to overcome this limitation by increasing the input voltage – thereby reducing the input current – and performing the final power conversion on the chip itself. This paper details the design and implementation of on-chip switched capacitor converters in deep submicron technologies. High capacitance density deep trench capacitors with a low parasitic bottom plate capacitor ratio available in the technology facilitate high power density and efficiency in on-chip switched capacitor converter implementations. The measured performance of a 2 : 1 voltage conversion ratio onchip switched capacitor converter implemented in 32 nm SOI CMOS technology with 1.8V input voltage results in a power density of 4.6W/mm at 86% efficiency when operated at a switching frequency of 100MHz.
File Format	PDF HTM / HTML
Alternate Webpage(s)	https://www.pes-publications.ee.ethz.ch/uploads/tx_ethpublications/3_A_4.6wmm_Power_Density_APEC2013.pdf
Language	English
Access Restriction	Open
Content Type	Text
Resource Type	Article

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