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Eliminating Voltage Emergencies via Microarchitectural Voltage Control Feedback and Dynamic Program Modification
| Content Provider | Semantic Scholar |
|---|---|
| Author | Hazelwood, Kim M. |
| Copyright Year | 2003 |
| Abstract | As processor clock gating becomes more and more prevalent, the resulting processor current fluctuations increase the chance of the power supply violating its operating voltage range. Today, low-power research has focused on hardware mechanisms to reduce the chances of these voltage emergencies. While these hardware solutions are very effective at reducing di/dt to an acceptable range, they do so at a performance penalty to the executing program. On the other hand, a compiler is well-equipped to rearrange instructions such that current fluctuations are less dramatic, while minimizing the performance implications. Furthermore, a software-based dynamic optimizer can eliminate the problem at the source-code level during program execution. This paper proposes complementing the hardware techniques with additional compiler-based techniques for eliminating power virus loops, and other recurring power problems. We propose that hardware solutions remain intact, but we extend them to additionally provide feedback to the dynamic optimization system, which can provide a permanent solution to the problem, often without affecting the performance of the executing program. We found that recurring voltage fluctuations do exist in the SPECcpu2000 benchmarks, and that given very little information from the hardware, a dynamic optimizer can locate and correct many of the recurring voltage emergencies. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.eecs.harvard.edu/~cettei/docs/tr-18-03.pdf |
| Alternate Webpage(s) | https://dash.harvard.edu/bitstream/handle/1/25753228/tr-18-03.pdf?isAllowed=y&sequence=1 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
