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Low-Insertion-Loss and Power-Efficient 32 × 32 Silicon Photonics Switch With Extremely High-Δ Silica PLC Connector
| Content Provider | Semantic Scholar |
|---|---|
| Author | Suzuki, Keijiro Konoike, Ryotaro Hasegawa, Junichi Suda, Satoshi Matsuura, Hiroyuki Ikeda, Kazuhiro Namiki, Shu Kawashima, Hitoshi |
| Copyright Year | 2019 |
| Abstract | We fabricate a 32 × 32 silicon photonics switch on a 300-mm silicon-on-insulator wafer by using our complementary metal-oxide-semiconductor pilot line equipped with an immersion ArF scanner and demonstrate an average fiber-to-fiber insertion loss of 10.8 dB with a standard deviation of 0.54 dB, and on-chip electric power consumption of 1.9 W. The insertion loss and the power consumption are approximately 1/60, and less than 1/4 of our previous results, respectively. These significant improvements are achieved by design and fabrication optimization of waveguides and intersections on the chip, and by employing a novel optical fiber connector based on extremely-high-Δ silica planar-lightwave-circuit (PLC) technology. The minimum crosstalk was −26.6 dB at a wavelength of 1547 nm, and −20-dB crosstalk bandwidth was 3.5 nm. Furthermore, we demonstrate low-crosstalk bandwidth expansion by using output port exchanged element switches. We achieve a −20 dB crosstalk bandwidth of 14.2 nm, which is four-times wider than that of the conventional element switch based 32 × 32 switch. |
| Starting Page | 116 |
| Ending Page | 122 |
| Page Count | 7 |
| File Format | PDF HTM / HTML |
| DOI | 10.1109/jlt.2018.2867575 |
| Volume Number | 37 |
| Alternate Webpage(s) | https://xplorestaging.ieee.org/ielx7/50/4357488/08450055.pdf?arnumber=8450055 |
| Alternate Webpage(s) | https://doi.org/10.1109/jlt.2018.2867575 |
| Journal | Journal of Lightwave Technology |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
