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Asymmetric Slotted Waveguide and Method for Fabricating the Same Cross-reference to Related Applications
| Content Provider | Semantic Scholar |
|---|---|
| Copyright Year | 2017 |
| Abstract | (57) ABSTRACT An asymmetric slotted waveguide and method for fabricating the same. The slotted waveguide is constructed in silicon-on insulator using a Complementary metal-oxide-semiconduc tor (CMOS) process. One or more wafers can be coated with a photo resist material using a photolithographic process in order to thereby bake the wafers via a post apply bake (PAB) process. An anti-reflective coating (TARC) can be further applied on the wafers and the wafers can be exposed on a scanner for the illumination conditions. After a post exposure bake (PEB), the wafers can be developed in a developer using a puddle develop process. Finally, the printed wafers can be processed using a shrink process to reduce the critical dimen sion (CD) of the slot and thereby achieve an enhanced asym metric slotted waveguide that is capable of guiding the optical radiation in a wide range of optical modulation applications using an electro-optic polymer cladding. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://patentimages.storage.googleapis.com/29/41/29/b2d31bb9dead6b/US20120321246A1.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
