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A Hardware Design Technique for Next Generation
| Content Provider | Semantic Scholar |
|---|---|
| Author | Nakamura, Tsugio Suzukawa, Nobuyuki Fuyutsume, Narito Kasahara, Hiroshi Tanaka, Teruo |
| Copyright Year | 2004 |
| Abstract | As for the next generation of ultra large-scale integrated circuit called system LSI and system in package, the difficulty in designing many large circuit blocks has been pointed out. Therefore, it is being searched for new ways to cope with designing them. In this paper, we propose a method of hardware modularization, each of which has the function of judging necessary operation without any control from the outside, and without any limitation of the operational precision, i.e. an autonomous module. We also discuss how to standardize the module interface for ease-of-use. |
| Starting Page | 995 |
| Ending Page | 1003 |
| Page Count | 9 |
| File Format | PDF HTM / HTML |
| DOI | 10.1541/ieejeiss.124.995 |
| Alternate Webpage(s) | https://www.jstage.jst.go.jp/article/ieejeiss/124/4/124_4_995/_pdf/-char/ja |
| Alternate Webpage(s) | https://doi.org/10.1541/ieejeiss.124.995 |
| Volume Number | 124 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
