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Design and implementation of a frequency synthesizer for an IEEE 802.15.4/Zigbee transceiver
| Content Provider | Semantic Scholar |
|---|---|
| Author | Srinivasan, Rangakrishnan |
| Copyright Year | 2007 |
| Abstract | Design and implementation of a frequency synthesizer for an IEEE 802.15.4/Zigbee transceiver (May 2006) Rangakrishna Srinivasan Chair of Advisory Committee: Edgar Sanchez-Sinencio/ Jose Silva-Martinez The frequency synthesizer, which performs the main role of carrier generation for the down-conversion/upconversion operations, is a key building block in radio transceiver front-ends. The design of a synthesizer for a 2.4 GHz IEEE 802.15.4/Zigbee transceiver forms the core of this work. This thesis provides a step-by-step procedure for the design of a frequency synthesizer in a transceiver environment, from the mapping of standardspecifications to its integrated circuit implementation in a CMOS technology. The results show that careful system level planning leads to high-performance realizations of the synthesizer. A strategy of using different supply voltages to enhance the performance of each building block is discussed. A section is presented on layout and board level issues, especially for radio-frequency systems, and their effect on synthesizer performance. The synthesizer consumes 15.5 mW and meets the specifications of the 2.4 GHz IEEE 802.15.4/Zigbee standard. It is capable of 5 GHz operation with a VCO sensitivity of 135 MHz/V and a tuning range of 700 MHz. It can be seen that the adopted methodology can be used for the design of high-performance frequency synthesizers for any narrow-band wireless standard. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://amsc.tamu.edu/students/Abstracts/masters/RangakrishnaSrinivasan.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
