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Capacitance-voltage characteristics measured through pulse technique on high-k dielectric MOS devices
| Content Provider | Semantic Scholar |
|---|---|
| Author | Lu, Qifeng Qi, Yanfei Zhao, C. Z. Zhao, Chun Taylor, Stephen Chalker, Paul R. |
| Copyright Year | 2018 |
| Abstract | Capacitance-voltage (CV) characteristics were investigated for MOS devices with ZrO2 and HfO2 high-k dielectrics using pulse technique and LCR meter. Opposite relative positions of the forward and reverse traces were observed for the CV curves extracted from the two techniques. This unusual phenomenon was believed to be caused by the interface dipoles formed at high-k/SiOx interface, since it was difficult to be convincingly explained by trapping/de-trapping of charges. The effect of interface dipoles on CV characteristics was found to be sensitive to the voltage ramp rate. In addition, a hump in the inversion region for the forward trace in pulse technique was detected. This may be due to an additional current due to the PN junction formed between the substrate and inversion layer via the pulse technique process. © 2016 Elsevier Ltd. All rights reserved. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://isiarticles.com/bundles/Article/pre/pdf/142689.pdf |
| Language | English |
| Access Restriction | Open |
| Subject Keyword | Depletion region Electric Capacitance Extraction High-κ dielectric Interface Device Component P–n junction RAMP Simulation Software for Modelling Reliability, Availability and Maintainability Tracing (software) voltage |
| Content Type | Text |
| Resource Type | Article |