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A heterogeneous reconfigurable System-on-Chip : MORPHEUS
| Content Provider | Semantic Scholar |
|---|---|
| Author | Thoma, Florian Kühnle, Matthias Grasset, Arnaud Brelet, Paul Millet, Philippe Bonnot, Philippe Campi, Fabio Voros, Nikolaos S. Putzke-Röming, Wolfram Schneider, Axel Huebner, Michael F. Mueller-Glaser, Klaus D. Becker, Jürgen |
| Copyright Year | 2011 |
| Abstract | The exponential increase of CMOS circuit complexity along the last decades has lead to two growing problems. The increasing Non-recurring Engineering (NRE) costs of ASICs or System-on-Chips are becoming only affordable to the highest volume applications. Additionally the design methodologies have not kept pace with the rising complexity leading to a rising design productivity gap. Research into reconfigurable architectures and NoC (Network-on-Chip) communication systems have shown paths for mitigating these problems for lower volume applications. In this paper, we present the European Integrated Project MORPHEUS (IST 027342). It advocates an innovative approach of heterogeneous, dynamically reconfigurable SoCs consisting of accelerators of various reconfiguration granularity connected by a NoC and supported by an integrated toolset for spatial and sequential design. The power of this approach is demonstrated with four applications from the industrial environment. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://world-comp.org/p2011/ERS6113.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
