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IEEE 1149.1-1990 Standard Test Access Port and Boundary Scan Application Note
| Content Provider | Semantic Scholar |
|---|---|
| Copyright Year | 1999 |
| Abstract | For sys tem or board d iagnost ics , AT6000 Series devices can be programmed with the 1149.1 standard test logic and then reprogrammed for normal operation when the diagnostics are comple te . The area and per fo rmance overhead of the test logic does not impact normal operation in the device because it is replaced by the logic for normal function. All mandatory test instructions can be executed with this portable test logic configuration, which guarantees conformance to the 1149.1 standard. The 1149.1 standard provides a consistent mechanism for confirming that each component in a system performs i ts required funct ion. Since AT6000 devices are factory-tested with test patterns that exercise all the programmable features, integrity is insured without having to rely on standard test logic. Standard test logic is best suited for check ing the interconnect ions between devices on the board. Boards are often multi-layer and double-sided, making traditional board test methods, like the bed-of-nails approach, expensive and impractical. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.atmel.com/Images/doc0474.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
