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Power management architecture of the 2nd generation Intel® Core microarchitecture, formerly codenamed Sandy Bridge
| Content Provider | Semantic Scholar |
|---|---|
| Author | Rotem, Efi Naveh, Alon Rajwan, Doron Ananthakrishnan, Avinash Weissmann, Eli |
| Copyright Year | 2011 |
| Starting Page | 1 |
| Ending Page | 33 |
| Page Count | 33 |
| File Format | PDF HTM / HTML |
| DOI | 10.1109/HOTCHIPS.2011.7477510 |
| Alternate Webpage(s) | http://www.hotchips.org/wp-content/uploads/hc_archives/hc23/HC23.19.9-Desktop-CPUs/HC23.19.921.SandyBridge_Power_10-Rotem-Intel.pdf |
| Alternate Webpage(s) | https://doi.org/10.1109/HOTCHIPS.2011.7477510 |
| Journal | 2011 IEEE Hot Chips 23 Symposium (HCS) |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |