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FABRICATION METHOD OF SEMCONDUCTOR MEMORY DEVICE CONTAINING CMOSTRANSISTORS BACKGROUND OF THE INVENTION 1. Field of the Invention
| Content Provider | Semantic Scholar |
|---|---|
| Author | Son, Jeong-Hwan |
| Copyright Year | 2017 |
| Abstract | A fabrication method for a semiconductor memory device which remarkably improves a short-channel characteristic, and increases a driving electric current of the device by differently forming the thickness of sidewall spacers formed at the sides of polysilicon gates in nMOS and pMOS regions, includes forming a gate insulating film on a semi conductor substrate having first and second regions, forming first and second gate electrodes in the first and second regions, respectively, on the substrate, forming a first con ductive low concentration impurity area at the sides of the first gate electrode, forming a second conductive low con centration impurity area at the sides of the second gate electrode, forming a first insulating film on the substrate and a second insulating film on the first insulating film, stripping the second insulating film in the first region, forming first sidewall spacers at the sides of the first gate electrode, forming a first conductive high concentration impurity area in the substrate at the sides of the first gate electrode, forming second sidewall spacers composed of the first and second insulating films at the sides of the second gate electrode in the second region, and forming a second con ductive high concentration impurity area in the substrate at the sides of the second gate electrode. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://patentimages.storage.googleapis.com/cd/25/c0/2c167455e4ed0b/US5696012.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |