Synthesis for mixed CMOS/PTL logic (poster paper)

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BDD decomposition for mixed CMOS/PTL logic circuit synthesis

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Synthesis for mixed CMOS/PTL logic

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Mixed. PTL/static logic synthesis using genetic algorithms for low-power applications

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Synthesis of high performance low power ptl circuits.

Anais do xxvi congresso da sbc wcompa l i workshop de computação e aplicações mixed cmos ptl adders.

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Logic synthesis for large pass transistor circuits (1997)

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Synthesis of single/dual-rail mixed PTL/static logic for low-power applications

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Simultaneous ptl buffer insertion and sizing for minimizing elmore delay (1998).