Loading...
Please wait, while we are loading the content...
Similar Documents
Interconnection Network and Distributed Shared Memory of a Massively Parallel Machine Jump-1
| Content Provider | Semantic Scholar |
|---|---|
| Author | Amano, Hideharu Nishimura, Katsunobu Nishi, Hiroaki |
| Copyright Year | 2007 |
| Abstract | For cache coherent distributed shared memory on a large scale parallel machine, each node processor of JUMP-1 shares a global virtual address space with two-stage TLB implementation. The directory is attached not to every cache line but to every page, while the data is transferred by the unit of a cache line. Reduced Hierarchical Bit-map Directory schemes (RHBDs) are introduced to manage coherent messages to a large number of nodes which share a page. Using a hierarchical structure of a network RDT(Recursive Diagonal Torus), coherent messages for RHBD are multicast quickly to local area of the source node. From the results of the simulation, all schemes of the RHBD support almost a half latency of the traditional directory scheme based on 1 to 1 message transfer. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www-amano.aa.cs.keio.ac.jp/proj/juten/papers/paracom96.ps.gz |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
