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Keysight Technologies IBIS-AMI Modeling of Asynchronous High Speed Link Systems
| Content Provider | Semantic Scholar |
|---|---|
| Author | Rao, Fangyi |
| Copyright Year | 2017 |
| Abstract | IBIS-AMI modeling for high-speed serial link systems becomes the de facto standard in the industry. The evolution of IBIS-AMI modeling standard started from a pure THRU channel modeling for NRZ signaling and expanded to the inclusion of crosstalk aggressors, to links containing repeaters, to back-channel transmitter (TX) and receiver (RX) equalizer training process, to the modeling of PAM4 and duobinary signaling. However, to date IBIS-AMI modeling can only deal with a synchronous system, indicating that the TX and RX share a common reference clock source. In real applications, there are many more systems that are designed for asynchronous operations, i.e., there exists certain frequency offset between the reference clocks for the transmitter and the receiver. Thus, clock-data-recovery (CDR) behavior in the case of frequency offset between the TX and the RX is not verified through the standard IBIS-AMI simulation. As a result, the impact of the frequency offset is not rigorously evaluated, leading to potential overoptimistic estimation of system performance. In this paper we propose an approach such that an asynchronous high-speed link system can be modeled within the existing IBIS-AMI framework, making it possible to study the dynamics of the CDR under the asynchronous condition through time domain simulations. The paper explains what it takes to perform asynchronous link system simulations. Details of enhancements to the existing modeling and simulation practice required to capture the asynchronous effect are described. Specific examples of asynchronous links are analyzed using the proposed approach, and simulation results are presented. The behavior of the CDR in the presence of reference clock frequency offset is demonstrated, and the consequent timing impairment is measured. The system tolerance to frequency ppm offset is investigated with channels having different loss profiles at different data rates. Finally, the impact of asynchronous TX and RX clocks on link budget and system performance is discussed. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://literature.cdn.keysight.com/litweb/pdf/5992-2137EN.pdf?id=2827146 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
