Limits of Instruction Level Parallelism with Data Speculation

Content Provider	Semantic Scholar
Author	González, José M. González, Antonio
Copyright Year	1997
Abstract	Increasing the instruction level parallelism (ILP) exploited by the processor is one of the key issues to boost the performance of future generation processors. Current processor organizations include different mechanisms to overcome the limitations imposed by name and control dependences but no mechanism targeting to data dependences. Thus, these dependences will become one of the main bottlenecks in the future. Data speculation is gaining popularity as a mechanism to overcome the limitations imposed by data dependences by predicting the values that flow through them. In this work, we present a study of the potential benefit of data speculation in order to boost the limits of instruction level parallelism sing both perfect and realistic predictors. Results show that arithmetic prediction is the most important source of improvement. Speedups obtained by data speculation are very huge for an infinite window and still significant for a limited window. Different prediction schemes oriented to single thread and multiple threads (from a single program) architectures have been studied. The latter shows a significant improvement respect to the former for FP benchmarks but for integer programs the difference is much smaller.
File Format	PDF HTM / HTML
Language	English
Access Restriction	Open
Content Type	Text
Resource Type	Article