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Polarisation analysing complementary metal-oxide semiconductor image sensor in 65-nm standard CMOS technology
| Content Provider | Semantic Scholar |
|---|---|
| Author | Wakama, Norimitsu Okabayashi, D. Noda, Toshihiko Sasagawa, Kiyotaka Tokuda, T. Kakiuchi, Kiyomi Ohta, Jun |
| Copyright Year | 2013 |
| Abstract | In the present study, the authors demonstrate a complementary metal-oxide semiconductor (CMOS) image sensor implemented with on-chip polarisers using 65-nm standard CMOS technology. The polariser is composed of metal wire grids made of metal wires fabricated by the CMOS process. An extinction ratio of 18.8 dB was obtained for a single pixel with an on-chip polariser, where the line/space widths have the finest pitch obtainable by 65-nm technology. Electrical crosstalk between pixels is reduced by over 25% using a guard ring structure. Polarisation imaging by the sensor was also performed. |
| Starting Page | 45 |
| Ending Page | 47 |
| Page Count | 3 |
| File Format | PDF HTM / HTML |
| DOI | 10.1049/joe.2013.0033 |
| Alternate Webpage(s) | https://digital-library.theiet.org/docserver/fulltext/joe/2013/9/JOE.2013.0033.pdf?accname=guest&checksum=153112DF27288D97C0213E24DFDAB0EF&expires=1561260737&id=id |
| Alternate Webpage(s) | https://doi.org/10.1049/joe.2013.0033 |
| Volume Number | 2013 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
