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Inter-task cache sharing for compositional embedded multiprocessors
| Content Provider | Semantic Scholar |
|---|---|
| Author | Molnos, Anca Mariana |
| Copyright Year | 2005 |
| Abstract | In current multi-media systems a major part of the application consists of multiple software tasks executed on a set of processors. Composing the system performance out of the tasks performance is possible only if these tasks interfere with each other in a predictable way. However, when the used memory hierarchy consists of shared caches, tasks flush each others data out of the cache in a unpredictable manner. This paper proposes a novel cache partitioning technique that ensures performance compostionality combined with cache efficiency. We perform two partitioning types. First, each task and each inter-task common data gets a exclusive part of the cache sets. Second, inside the cache sets of common data each task accessing it gets a number of ways. We confirm the proposed method on a homogeneous multiprocessor using two applications: H.264 decoding and picture-in-picture-TV. Our experiments indicate that the difference between the sum of misses of individual tasks in isolation and the number of misses of the complete application is at maximum 3%, so we can conclude that compositionality is achieved. Additionally, when compared to the shared cache scenario the execution time is improved up to 16% and the miss rate is reduced with up to 9%. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://ce-publications.et.tudelft.nl/publications/898_intertask_sharing_data_and_instructions_in_cache_with_enabl.pdf |
| Alternate Webpage(s) | http://ce.et.tudelft.nl/publicationfiles/1093_291_prorisc2005.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
