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A Scheme for the BSP Scheduling of Generic Loop Nests
| Content Provider | Semantic Scholar |
|---|---|
| Author | Calinescu, Radu |
| Copyright Year | 1997 |
| Abstract | This report presents a scheme for the bulk-synchronous parallel (BSP) scheduling of generic, untightly nested loops. Being targeted at the BSP model of computation, the novel parallelisation scheme yields parallel code which is scalable, portable, and whose cost can be accurately analysed. The scheme comprises three stages: data dependence analysis and potential parallelism identiication, data and computation partitioning, and synchronisation and communication generation. New algorithms tackling each of the three stages are presented in the report, together with an algorithm for assessing the cost of the resulting BSP schedules. |
| File Format | PDF HTM / HTML |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |