Loading...
Please wait, while we are loading the content...
Similar Documents
A CMOS 8 bit , 400 Msamples / s , 125 Mhz bandwidth ADC for Gigabit Ethernet and other Embedded Applications
| Content Provider | Semantic Scholar |
|---|---|
| Author | Choudhary, Vikas |
| Copyright Year | 1999 |
| Abstract | A 8bit high speed A/D converter for applications in fast Ethernet local area network has been designed in 0.25u CMOS, 3.3V technology. The project is more of an attempt to understand and figure out principal design challenges for such a fast A/D converter for Gigabit Ethernet applications. Important concepts like folding, interpolating for reducing the power and area, averaging technique for improving the DNL and INL from nonidealities like mismatch, random offset etc has been studied and employed here. Measurement techniques for predicting the performance of this ADC in simulation have been established. Circuit and Layout issues have not been studied in much detail, though outline of challenges involved with the components for such a high speed ADC have been discussed. In simulation an ADC with ENOB of 6.5bits for 125Mhz at a 400Msamples/s has been achieved. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://kabuki.eecs.berkeley.edu/~gchien/NTU/Projects/vikas.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
