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450 mm Silicon Wafer : Economical and Technical Challenges
| Content Provider | Semantic Scholar |
|---|---|
| Author | Chaturvedi, Ankita Tyagi, Pallavie Tyagi, Shivaji Srivastava, Adarsh K. |
| Copyright Year | 2012 |
| Abstract | Following Moore's law semiconductor industry had acquired unprecedented growth by providing more capability at equal or low cost. Semiconductor industry increased the wafer size with new fab architecture at every ten years while technological and device advancements like miniaturization, new materials, silicon waste reduction, design and manufacturing process improvements at every two years which has reduced the cost per function. The capital investments require in overall factory integration has increased. This paper discusses the economical and technical issues regarding the transition to 450 mm. Technical challenges can be handled by making contemporary changes across semiconductor industry. Keywords450 mm Wafer Diameter, fab economis, manufacturing process, wafer thickness. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.ijcta.com/documents/volumes/vol3issue3/ijcta2012030337.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
