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Hardware acceleration for lock-free data structures and software-transactional memory
| Content Provider | Semantic Scholar |
|---|---|
| Author | Diestelhorst, Stephan Hohmuth, Michael |
| Copyright Year | 2008 |
| Abstract | In this paper, we report on a new CPU-architecture extension proposal, named Advanced Synchronization Facility (ASF), which is geared toward accelerating and easing lock-free programming and software transactional memory (STM). We present an initial performance simulation and usability study of ASF's application to a lock-free data structure (a singly linked list) and to accelerating a state-of-the-art STM system, TinySTM. Our results indicate that ASF can significantly increase the throughput and scaling behavior of these workloads: Single-thread performance increased by up to 15 %, and the factor of scaling to eight CPUs increased by up to 20 %. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.researchgate.net/profile/Stephan_Diestelhorst/publication/228577815_Hardware_acceleration_for_lock-free_data_structures_and_software-transactional_memory/links/0deec53a2b4812b704000000.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
