Loading...
Please wait, while we are loading the content...
Rigel : A Scalable Architecture for 1000 + Core Accelerators
| Content Provider | Semantic Scholar |
|---|---|
| Author | Johnson, Daniel R. Kelm, John H. Crago, Neal Clayton Johnson, Matthew Richard Tuohy, William Truty, Wojciech Jan Kofsky, Stephen M. Lumetta, Steven S. Hwu, Mei W. Frank, Matthew I. Patel, Sanjay J. |
| Copyright Year | 2009 |
| Abstract | We describe Rigel, an architecture for 1000+ core MIMD accelerators, and its Low-level Programming Interface (LPI). We describe Rigel's cached single address space memory hierarchy, motivated by dominant BSP-like application characteristics. We provide analysis of Rigel in the form of kernel scalability results as well as area and power estimates for a 1024-core design. We find that Rigel can achieve a density of 8 single-precision GFLOPS mm2 in 45nm, comparable to high-end GPUs scaled to 45nm. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://saahpc.ncsa.illinois.edu/09/papers/Johnson_paper.pdf |
| Alternate Webpage(s) | http://saahpc.ncsa.illinois.edu/09/sessions/day3/session2/Johnson_presentation.pdf |
| Alternate Webpage(s) | http://rigel.crhc.illinois.edu/pub/saahpc09.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
