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Center for Reliable Computing TECHNICAL REPORT ED 4 I : Error Detection by Diverse Data and Duplicated Instructions
| Content Provider | Semantic Scholar |
|---|---|
| Author | Oh, Nahmsuk Mitra, S. McCluskey, Edward J. |
| Copyright Year | 2001 |
| Abstract | Errors in computer systems can cause abnormal behavior and degrade data integrity and system availability. Fault avoidance techniques such as radiation hardening and shielding have been the major approaches to protecting the system from transient errors, but these techniques are expensive. Recently, unhardened Commercial Off-The-Shelf (COTS) components have been investigated for a low cost alternative to fault avoidance techniques, and Software Implemented Hardware Fault Tolerance (SIHFT) has been proposed to increase the data integrity and availability of COTS systems. EDI is a SIHFT technique that detects both permanent and temporary errors by executing two “different” programs (with the same functionality) and comparing their outputs. ED I maps each number, x, in the original program into a new number x′, and then transforms the program so that it operates on the new numbers so that the results can be mapped backwards for comparison with the results of the original program. The mapping in the transformation of ED I is x′ = k⋅x for integer numbers, where k determines the fault detection probability and data integrity of the system. We have developed a transformation algorithm for ED I and demonstrated how to choose an optimal value of k for the transformation. This paper shows that for integer programs, the transformation with k = -2 was the most desirable choice in six out of seven benchmark programs simulated. It maximizes fault detection probability under the condition that data integrity is the highest. For programs that use floating point numbers, we need two transformed programs: the first one with 2 10101010 2 3 1 2 × − = k and the second one with 2 01010101 2 3 2 2 × − = k . We demonstrate these results by both theoretical and simulation analysis. FUNDING: This work was supported in part by the Ballistic Missile Defense Organization, Innovative Science and Technology (BMDO/IST) Directorate and administered through the Department of the Navy, Office of Naval Research under Grant Nos. N00014-92-J-1782 and N00014-95-1-1047 Imprimatur: Philip Shirvani and Nirmal Saxena CRC-TR 00 8 November, 2000 Center for Reliable Computing Gates Building 2A, Room 236 Computer Systems Laboratory Dept. of Electrical Engineering and Computer Science Stanford University Stanford, California 94305-9020 |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://crc.stanford.edu/crc_papers/CRC-TR-00-8.pdf |
| Alternate Webpage(s) | http://www-crc.stanford.edu/crc_papers/CRC-TR-00-8.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Report |