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Low voltage, low power CMOS analog circuit design techniques for mobile, portable VLSI applications /
| Content Provider | Semantic Scholar |
|---|---|
| Author | Hung, Chung-Chih |
| Copyright Year | 1997 |
| Abstract | In the past decade, CMOS technology has played a major role in the rapid ad vancement and the increased integration of VLSI systems. CMOS devices feature high input impedance, extremely low offset switches, high packing density, low switching power consumption, and most importantly, they are easily scaled. With the reduction of the device minimum feature size, in order to prevent the transistor from breakdown because of the higher electrical field across the gate oxide and to ensure its reliability, the power supply voltage is necessary to be reduced. W ith the reduction of the device minimum feature size, more and more transistors can be fabricated into a single chip. Nevertheless, the large amount of circuits inte grated in a chip result in huge power consumption. Decrease of the supply voltage can not only ensure the device reliability, but also reduce power consumption in a sig nificant amount. Furthermore, portable/mobile electronic equipments have become the trends of the present and future market demands. Low power supplies are the requirements of the portable/mobile electronic products. In this dissertation, we focus on the low-voltage, low-power CMOS circuit de sign. Each circuit either features a rail-to-rail common-mode input voltage and/or consumes very low power. These circuits target applications in mobile telecommuni cations (rail-to-rail strong-inversion circuits) and in (portable) medical applications |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://etd.ohiolink.edu/!etd.send_file?accession=osu1487943341527253&disposition=inline |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
