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909 Skewed Associativity Enhances Performance Predictability
| Content Provider | Semantic Scholar |
|---|---|
| Author | Bodin, François Seznec, André |
| Copyright Year | 1995 |
| Abstract | Performance tuning becomes harder as computer technology advances. One of the factors is the increasing complexity of memory hierarchies. Most modern machines now use at least one level of cache memory. To reduce execution stalls, cache misses must be very low. Software techniques used to improve locality have been developped for numerical codes, such as loop blocking and copying. Unfortunately, the behavior of direct mapped and set associative caches is still erratic when large numerical data is accessed. Execution time can vary drasticly for the same loop kernel depending on uncontrolled factors such as array leading size. The only software method available to improve execution time stability is the copying of frequently used data, which is costly in execution time. Users are not usually cache organisation experts. They are not aware of such phenomena, and have no control over it. In this paper, we show that the recently proposed 4-way skewed associative cache yields very stable execution times and good average miss ratios on blocked algorithms. As a result, execution time is faster and much more predictable than with conventional caches. As a result of its better comportment, it is possible to use larger blocks sizes with blocked algorithms, which will furthermore reduces blocking overhead costs. Le comportement des caches associatifs brouill es est pr evisible R esum e : Les performances des ordinateurs d'aujourd'hui sont devenues tr es diiciles a exploiter et a pr evoir. Un des facteurs rendant cette pr evision extr emement complexe est l'utilisation de hi erarchies m emoires, et en particulier de m emoire caches. Des transformations de programmes telles que le blocage de boucles peuvent ^ etre utilis ees pour am eliorer la localit e des applications dans les codes num eriques. Malheureusement, le comportement des caches a correspondance directes et des caches associatifs par ensemble sont tr es sensibles a des param etres tels que le placement des tableaux en m emoire ; ceci entraine parfois des chutes de performances impr edictibles et catastrophiques m^ eme sur des codes bloqu es. La plupart des utilisateurs ne peuvent pas ^ etre conscients de tels ph enom enes. Dans cet article, nous montrons que le cache associatif brouill e 4 voies que nous avons r ecemment propos e est a peu pr es insensible au placement relastif des tableaux en m emoire et qu'il fournit ainsi une performance pr edictible et stable a l'usager. De … |
| File Format | PDF HTM / HTML |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
