Loading...
Please wait, while we are loading the content...
Similar Documents
Signal Integrity and PCB layout considerations for DDR 2800 Mb / s and DDR 3 Memories
| Content Provider | Semantic Scholar |
|---|---|
| Author | Brennan, Chris Tudor, Cristian Schroeter, Eric H. Wunschmann, Heike Bokhari, Syed |
| Copyright Year | 2007 |
| Abstract | The paper addresses the challenge of meeting Signal Integrity (SI) and Power Integrity (PI) requirements of Printed Circuit Boards (PCBs) containing Double Data Rate 2 (DDR2) memories. The emphasis is on low layer count PCBs, typically 4-6 layers using conventional technology. Some design guidelines have been provided. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.fidus.com/downloads/signal_integrity/Fidus_SI_and_DDR2-3_Whitepaper.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |