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Inductorless 8.9 mW 25 Gb/s 1:4 DEMUX and 4 mW 13 Gb/s 4:1 MUX in 90 nm CMOS
| Content Provider | Semantic Scholar |
|---|---|
| Author | Sekiguchi, Takayuki Amakawa, Shuhei Ishihara, Noboru Masu, Kazuya |
| Copyright Year | 2010 |
| Abstract | A low-power inductorless 1:4 DEMUX and a 4:1 MUX for a 90 nm CMOS are presented. The DEMUX can be operated at a speed of 25 Gb/s with the power supply voltage of 1.05 V, and the power consumption is 8.9 ㎽. The area of the DEMUX core is 29 × 40 ㎛². The operation speed of the 4:1 MUX is 13 Gb/s at a power supply voltage of 1.2 V, and the power consumption is 4 ㎽. The area of the MUX core is 30 × 18 ㎛². The MUX/DEMUX mainly consists of differential pseudo-NMOS. In these MUX/DEMUX circuits, logic swing is nearly rail-torail, and a low Vdd. The component circuit is more scalable than a CML circuit, which is commonly used in a high-performance MUX/DEMUX. These MUX/DEMUX circuits are compatible with conventional CMOS logic circuit, and it can be directly connected to CMOS logic gates without logic level conversion. Furthermore, the circuits are useful for core-to-core interconnection in the system LSI or chip-to-chip communication within a multi-chip module, because of its low power, small footprint, and reasonable operation speed. |
| Starting Page | 176 |
| Ending Page | 184 |
| Page Count | 9 |
| File Format | PDF HTM / HTML |
| DOI | 10.5573/JSTS.2010.10.3.176 |
| Volume Number | 10 |
| Alternate Webpage(s) | http://ocean.kisti.re.kr/downfile/volume/ieek/E1STAN/2010/v10n3/E1STAN_2010_v10n3_176.pdf |
| Alternate Webpage(s) | https://doi.org/10.5573/JSTS.2010.10.3.176 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
