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Architecture and Design of an 8-bit Flux-1 Superconductor Rsfq Microprocessor
| Content Provider | Semantic Scholar |
|---|---|
| Author | Dorojevets, Mikhail N. |
| Copyright Year | 2002 |
| Abstract | The first single-chip superconductor FLUX-1 microprocessor has been designed in the Rapid Single Flux Quantum (RSFQ) logic and fabricated using 4 kA/cm2, 1.75-μm Nb/AlOx/Nb Josephson junction technology as a result of the collaboration between SUNY Stony Brook and TRW, Inc. A FLUX-1 chip represents an 8-bit deeply pipelined microprocessor prototype with a target clock frequency of 17-20 GHz. A new parallel partitioned architecture has been developed in order to tolerate interconnect delays and fill long FLUX-1 processor pipelines with useful instructions. The processor includes the 16 × 32-bit pipelined instruction memory, 8 integer arithmetic-logic units interleaved with 8 registers, the branch unit, and I/O ports for 5-GHz chip-to-chip communication over Nb microstrip lines on a chip carrier. The FLUX-1 instruction set consists of ~25 arithmetic, logical, and control instructions. A FLUX-1 microprocessor chip contains 65,759 Josephson junctions on a 10.6 mm × 13.2 mm die with flip-chip packaging. First FLUX-1 chips fabricated in August 2001 are currently under testing at TRW, Inc. |
| Starting Page | 521 |
| Ending Page | 529 |
| Page Count | 9 |
| File Format | PDF HTM / HTML |
| DOI | 10.1142/S0129156402001435 |
| Volume Number | 12 |
| Alternate Webpage(s) | http://www.researchgate.net/profile/Mikhail_Dorojevets/publication/259873493_Architecture_and_design_of_an_8-bit_FLUX-1_superconductor_RSFQ_microprocessor/links/0046352f54999bfe4f000000.pdf |
| Alternate Webpage(s) | https://doi.org/10.1142/S0129156402001435 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
