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UA2TPG: An untestability analyzer and test pattern generator for SEUs in the configuration memory of SRAM-based FPGAs
| Content Provider | Scilit |
|---|---|
| Author | Bernardeschi, Cinzia Cassano, Luca Domenici, Andrea Sterpone, Luca |
| Copyright Year | 2016 |
| Description | Journal: Integration |
| Related Links | https://arpi.unipi.it/bitstream/11568/790727/5/ivlsij16pp.pdf |
| Ending Page | 97 |
| Page Count | 13 |
| Starting Page | 85 |
| ISSN | 01679260 |
| DOI | 10.1016/j.vlsi.2016.03.004 |
| Journal | Integration |
| Volume Number | 55 |
| Language | English |
| Publisher | Elsevier BV |
| Publisher Date | 2016-09-01 |
| Access Restriction | Open |
| Subject Keyword | Journal: Integration Hardware and Architecture Single Event Upset Sram-based Fpga Untestability Analysis Model Checking |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture Software |