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HeTERO: Hybrid Topology Exploration for RF-Based On- Chip Networks
| Content Provider | Scilit |
|---|---|
| Author | Eachempati, Soumya Das, Reetuparna Narayanan, Vijaykrishnan Xie, Yuan Datta, Suman Das, Chita R. |
| Copyright Year | 2018 |
| Description | Future microprocessors are predicted to consist of 10s to 100s of cores running several concurrent tasks. A scalable communication fabric is required to connect these components and thus, giving birth to networks on silicon, also known as Network-on-Chip (NoC). NoCs are being used as the de facto solution for integrating the multicore architectures, as opposed to point-topoint global wiring, shared buses, or monolithic crossbars, because of their scalability and predictable electrical properties. Book Name: Communication Architectures for Systems-on-Chip |
| Related Links | https://content.taylorfrancis.com/books/download?dac=C2010-0-28564-5&isbn=9781315217574&doi=10.1201/b10805-13&format=pdf |
| Ending Page | 278 |
| Page Count | 48 |
| Starting Page | 231 |
| DOI | 10.1201/b10805-13 |
| Language | English |
| Publisher | Informa UK Limited |
| Publisher Date | 2018-09-03 |
| Access Restriction | Open |
| Subject Keyword | Book Name: Communication Architectures for Systems-on-Chip Telecommunications Microprocessors |
| Content Type | Text |
| Resource Type | Chapter |
