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Exception Handling: ARM7TDMI
| Content Provider | Scilit |
|---|---|
| Author | Hohl, William Hinds, Christopher |
| Copyright Year | 2014 |
| Description | Book Name: ARM Assembly Language |
| Abstract | Large applications, including operating systems, often have to deal with inputs from various sources, such as keyboards, mice, USB ports, and even power management blocks telling the processor its battery is about to run dry. Sometimes an embedded microcontroller has only one or two external input sources (e.g., from sensors in an engine), but it may still have peripheral devices that may need attention from time to time, such as a watchdog timer. Universal asynchronous receiver/transmitters (UARTs), wake-up alerts, analog-to-digital converters (ADCs), and I2C devices can all demand the processor’s time. In the next two chapters, we’re going to examine the different types of exceptions a processor can face in light of the fact that they are not isolated, only running code and talking to no one. In our definition of an exception, the events that can cause one must not be immediately thought of as bad or unwanted. Exceptions include benign events like an interrupt, and this can be any kind of interrupt, like someone moving a mouse or pushing a button. Technically, anything that breaks a program’s normal flow could be considered an exception, but it’s worth detailing the different types, since some can be readily handled and others are unexpected and can cause problems. At this end of the spectrum, catastrophic faults, such as a bus error when trying to fetch an instruction, may have no solution in software and the best outcome may be to alert the user before halting the entire system. Certain events can lead to a serious system failure, and while they are rare, they should be anticipated to help find the cause of the problem during application development or to plan for a graceful shutdown. For example, a rogue instruction in the processor’s pipeline or a memory access to an address that doesn’t exist should not occur once the software is finished and tested. Version 4T cores and version 7-M cores handle exceptions differently, and we’ll therefore examine the exception model for the Cortex-M4 in Chapter 15. In this chapter, we’ll start with the exception model for the ARM7TDMI, and we’ll examine exceptions in two large classes-interrupts and error conditions. |
| Related Links | https://content.taylorfrancis.com/books/download?dac=C2013-0-24706-0&isbn=9780429162046&doi=10.1201/b17562-18&format=pdf |
| Ending Page | 349 |
| Page Count | 28 |
| Starting Page | 322 |
| DOI | 10.1201/b17562-18 |
| Language | English |
| Publisher | Informa UK Limited |
| Publisher Date | 2014-10-20 |
| Access Restriction | Open |
| Subject Keyword | Book Name: Arm Assembly Language Hardware and Architecturee Alerts Processor Interrupt Handled Arm7tdmi Handle Exceptions |
| Content Type | Text |
| Resource Type | Chapter |
