NDLI: An 8-bit Radix-4 Non-Volatile Parallel Multiplier

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An 8-bit Radix-4 Non-Volatile Parallel Multiplier

Content Provider	MDPI
Author	Fu, Chengjie Zhu, Xiaolei Huang, Kejie Gu, Zheng
Copyright Year	2021
Description	The data movement between the processing and storage units has been one of the most critical issues in modern computer systems. The emerging Resistive Random Access Memory (RRAM) technology has drawn tremendous attention due to its non-volatile ability and the potential in computation application. These properties make them a perfect choice for application in modern computing systems. In this paper, an 8-bit radix-4 non-volatile parallel multiplier is proposed, with improved computational capabilities. The corresponding booth encoding scheme, read-out circuit, simplified Wallace tree, and Manchester carry chain are presented, which help to short the delay of the proposed multiplier. While the presence of RRAM save computational time and overall power as multiplicand is stored beforehand. The area of the proposed non-volatile multiplier is reduced with improved computing speed. The proposed multiplier has an area of 785.2 $μ$ m $2$ with Generic Processing Design Kit 45 nm process. The simulation results show that the proposed multiplier structure has a low computing power at 161.19 $μ$ W and a short delay of 0.83 ns with 1.2 V supply voltage. Comparative analyses are performed to demonstrate the effectiveness of the proposed multiplier design. Compared with conventional booth multipliers, the proposed multiplier structure reduces the energy and delay by more than 70% and 19%, respectively.
Starting Page	2358
e-ISSN	20799292
DOI	10.3390/electronics10192358
Journal	Electronics
Issue Number	19
Volume Number	10
Language	English
Publisher	MDPI
Publisher Date	2021-09-27
Access Restriction	Open
Subject Keyword	Electronics Hardware and Architecturee Multiplier Rram Modified Booth Algorithm Wallace Tree
Content Type	Text
Resource Type	Article

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