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A Review of Algorithms and Hardware Implementations for Spiking Neural Networks
| Content Provider | MDPI |
|---|---|
| Author | Nguyen, Duy-Anh Tran, Xuan-Tu Iacopi, Francesca |
| Copyright Year | 2021 |
| Description | Deep Learning (DL) has contributed to the success of many applications in recent years. The applications range from simple ones such as recognizing tiny images or simple speech patterns to ones with a high level of complexity such as playing the game of Go. However, this superior performance comes at a high computational cost, which made porting DL applications to conventional hardware platforms a challenging task. Many approaches have been investigated, and Spiking Neural Network (SNN) is one of the promising candidates. SNN is the third generation of Artificial Neural Networks (ANNs), where each neuron in the network uses discrete spikes to communicate in an event-based manner. SNNs have the potential advantage of achieving better energy efficiency than their ANN counterparts. While generally there will be a loss of accuracy on SNN models, new algorithms have helped to close the accuracy gap. For hardware implementations, SNNs have attracted much attention in the neuromorphic hardware research community. In this work, we review the basic background of SNNs, the current state and challenges of the training algorithms for SNNs and the current implementations of SNNs on various hardware platforms. |
| Starting Page | 23 |
| e-ISSN | 20799268 |
| DOI | 10.3390/jlpea11020023 |
| Journal | Journal of Low Power Electronics and Applications |
| Issue Number | 2 |
| Volume Number | 11 |
| Language | English |
| Publisher | MDPI |
| Publisher Date | 2021-05-24 |
| Access Restriction | Open |
| Subject Keyword | Journal of Low Power Electronics and Applications Hardware and Architecturee Spiking Neural Networks Deep Neural Networks Deep Learning Fpga Digital Design |
| Content Type | Text |
| Resource Type | Article |
