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Demystifying Non-Isolated DC–DC Topologies on Partial Power Processing Architectures
| Content Provider | MDPI |
|---|---|
| Author | Anzola, Jon Aizpuru, Iosu Arruti, Asier Artal-Sevil, Jesus Sergio Bernal, Carlos |
| Copyright Year | 2022 |
| Description | This paper discusses the possibility of achieving partial power processing with non-isolated DC–DC topologies. To this end, partial power converter architectures are seen as an interesting solution for reducing the power processed by the converter. We observed via simulations that single-inductor non-isolated topologies cannot achieve partial power processing since the obtained current and voltage waveforms were the same as those found in a full-power converter. However, when using double inductor non-isolated topologies, reduced current and improved efficiencies were achieved. In order to confirm the results obtained from the simulations, single- and double-inductor topologies were tested experimentally. Finally, it was concluded that a double-inductor non-isolated topology can improve its performance by using partial power processing. |
| Starting Page | 480 |
| e-ISSN | 20799292 |
| DOI | 10.3390/electronics11030480 |
| Journal | Electronics |
| Issue Number | 3 |
| Volume Number | 11 |
| Language | English |
| Publisher | MDPI |
| Publisher Date | 2022-02-06 |
| Access Restriction | Open |
| Subject Keyword | Electronics Hardware and Architecturee Partial Power Processing Partial Power Converter Series Connected Converter Non-isolated Topologies |
| Content Type | Text |
| Resource Type | Article |
