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A 3.7-to-10 GHz Low Phase Noise Wideband LC-VCO Array in 55-nm CMOS Technology
| Content Provider | MDPI |
|---|---|
| Author | Yao, Yan Li, Zhiqun Li, Zhennan Chen, Bofan Wang, Xiaowei |
| Copyright Year | 2022 |
| Description | This paper presents a four-core LC-VCO array in 55 nm CMOS technology. Based on the multi-core VCO array technology and the switched capacitor array technology, the tuning range is expanded, and the phase noise optimization in a wide tuning range is achieved based on the second harmonic noise filtering technology and the Q value degeneration technology, as well as the optimization of the capacitor array switching transistors. The proposed VCO array, occupying a chip area of 1.65 × 1.44 $mm^{2}$, realizes a measured oscillation frequency range of about 3.7−10 GHz with phase noise of −127.5~−116.08 dBc/Hz at 1 MHz frequency offset, and achieves an output power of 2.69 dBm from a total power consumption of 52.8 mW. |
| Starting Page | 1897 |
| e-ISSN | 20799292 |
| DOI | 10.3390/electronics11121897 |
| Journal | Electronics |
| Issue Number | 12 |
| Volume Number | 11 |
| Language | English |
| Publisher | MDPI |
| Publisher Date | 2022-06-16 |
| Access Restriction | Open |
| Subject Keyword | Electronics Vco Array Low Phase Noise Wideband Cmos Sdr |
| Content Type | Text |
| Resource Type | Article |
