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Evaluation of HPC Acceleration and Interconnect Technologies for High-Throughput Data Acquisition
| Content Provider | MDPI |
|---|---|
| Author | Cilardo, Alessandro |
| Copyright Year | 2021 |
| Description | Efficient data movement in multi-node systems is a crucial issue at the crossroads of scientific computing, big data, and high-performance computing, impacting demanding data acquisition applications from high-energy physics to astronomy, where dedicated accelerators such as FPGA devices play a key role coupled with high-performance interconnect technologies. Building on the outcome of the RECIPE Horizon 2020 research project, this work evaluates the use of high-bandwidth interconnect standards, namely InfiniBand EDR and HDR, along with remote direct memory access functions for direct exposure of FPGA accelerator memory across a multi-node system. The prototype we present aims at avoiding dedicated network interfaces built in the FPGA accelerator itself, leaving most of the resources for user acceleration and supporting state-of-the-art interconnect technologies. We present the detail of the proposed system and a quantitative evaluation in terms of end-to-end bandwidth as concretely measured with a real-world FPGA-based multi-node HPC workload. |
| Starting Page | 7759 |
| e-ISSN | 14248220 |
| DOI | 10.3390/s21227759 |
| Journal | Sensors |
| Issue Number | 22 |
| Volume Number | 21 |
| Language | English |
| Publisher | MDPI |
| Publisher Date | 2021-11-22 |
| Access Restriction | Open |
| Subject Keyword | Sensors Information and Library Science Hpc Interconnects Communication Fpga Data Acquisition |
| Content Type | Text |
| Resource Type | Article |
